Hardware Testing

FPGA

cocotb: Python-Based Hardware Testing for FPGAs and ASICs

cocotb (Coroutine-Based Co-simulation Testbench) lets you write hardware testbenches in Python instead of VHDL or SystemVerilog. Your Python code drives and monitors HDL signals via a simulator (ModelSim, Questa, Verilator, Icarus, etc.) through a VPI/VHPI interface. The result: familiar Python tooling (pytest, coverage, CI) for hardware verification.